INVERT: Create ones complement (S7-1200, S7-1500) - STEP 7

FBD (S7-1200, S7-1500)

ft:publication_title
FBD (S7-1200, S7-1500)
Product
STEP 7
Version
V20
Publication date
11/2024
Language
en-US
INVERT: Create ones complement

Description

You can use the instruction "Create ones complement" to invert the signal status of the bits at input IN. When the instruction is processed, the value at input IN is linked to EXCLUSIVE OR by a hexadecimal mask (W#16#FFFF for 16-bit numbers or DW#16#FFFF FFFF for 32-bit number). This inverts the signal state of the individual bits that are then stored at output OUT.

Parameters

The following table shows the parameters of the instruction "Create ones complement":

Parameters

Declaration

Data type

Memory area

Description

S7-1200

S7-1500

EN

Input

BOOL

I, Q, M, D, L or constant

I, Q, M, D, L, T, C or constant

Enable input

ENO

Output

BOOL

I, Q, M, D, L

I, Q, M, D, L

Enable output

IN

Input

Bit strings, integers

I, Q, M, D, L, P, or constant

I, Q, M, D, L, P, or constant

Input value

OUT

Output

Bit strings, integers

I, Q, M, D, L, P

I, Q, M, D, L, P

Ones complement of the value at input IN

You can select the data type of the instruction from the "<???>" drop-down list of the instruction box.

For additional information on valid data types, refer to "See also".

Example

The following example shows how the instruction works:

The following table shows how the instruction works using specific operand values:

Parameters

Operand

Value

IN

TagIn_Value

W#16#000F

W#16#7E

OUT

TagOut_Value

W#16#FFF0

W#16#81

If operand "TagIn" has the signal state "1", the "Create ones complement" instruction is executed. The instruction inverts the signal state of the individual bits at input "TagIn_Value" and writes the result to output "TagOut_Value". The enable output ENO and the output "TagOut" are set to signal state "1".