P=: Set operand on positive signal edge (S7-1200, S7-1500) - STEP 7

FBD (S7-1200, S7-1500)

ft:publication_title
FBD (S7-1200, S7-1500)
Product
STEP 7
Version
V20
Publication date
11/2024
Language
en-US
P=: Set operand on positive signal edge

Description

You can use the instruction "Set operand on positive signal edge" to set a specified operand (<Operand2>) when there is a "0" to "1" change in the result of logic operation (RLO). The instruction compares the current RLO with the RLO from the previous query, which is saved in the edge memory bit (<Operand1>). If the instruction detects a change in the RLO from "0" to "1", there is a positive signal edge.

The positive signal edge is queried each time the instruction executes. When a positive edge is detected, <Operand2> is set to signal state "1" for one program cycle. In all other cases, the operand has the signal state "0".

You specify the operand (<Operand2>) to be set in the operand placeholder above the instruction. Specify the edge memory bit (<Operand1>) in the operand placeholder below the instruction.

Note

Modification of the address of the edge memory bit

The address of the edge memory bit must not be used more than once in the program, otherwise the bit memory is overwritten. This would influence edge evaluation and the result would no longer be unequivocal. The memory area of the edge memory bit has to be located in a DB (static area for FB) or in the bit memory area.

Parameters

The following table shows the parameters of the instruction "Set operand on positive signal edge":

Parameters

Declaration

Data type

Memory area

Description

<Operand2>

Output

BOOL

I, Q, M, D, L

Operand which is set when there is a positive signal edge.

<Operand1>

InOut

BOOL

I, Q, M, D, L

Edge memory bit

Example

The following example shows the parameters of the instruction:

The "TagOut" output is set for one program cycle, when the signal state at the input of the instruction box switches from "0" to "1" (positive signal edge). In all other cases, the "TagOut" output has signal state "0".